An Integrate-and-dump Receiver for Fiber Optic Networks

AN INTEGRATE-AND-DUMP RECEIVER FOR FIBER OPTIC NETWORKS by ANDREW E. STEVENS The receiver in an optical communication system is a key component in determining the overall system performance. This thesis will present a new optical receiver which mathematically integrates the arriving bits with respect to time in order to improve receiver sensitivity. This so-called integrate-and-dump circuit is a classical result from communication theory, but has not previously been adapted to modern-day integrated circuit technology. This thesis will explore the theoretical basis for the integrate-and-dump circuit and will explain the advantages and disadvantages of this method. A comparison of the performance of several receiver noise filtering methods is made which shows that the integrate-and-dump scheme has the best realizable performance. A new architecture is proposed which uses parallel signal processing in order to relax the requirements on the integrators. In addition, an new biasing method allows connection of the photodetector to the integrator without ac coupling capacitors, thereby improving low-bitrate performance. A balanced symmetrical circuit topology and differential output allows cancellation of circuit and external noise for improved noise rejection. A test chip for the integrate-and-dump receiver was implemented in a 1.2 μm CMOS technology. The chip achieves a sensitivity of -49.4 dBm at 10 Mb/s with a bit error rate of 10−9. In addition, the chip can operate at bit rates exceeding 100 Mbits/s. The total active circuit area is approximately 1 mm × 1 mm, and the total static power dissipation is approximately 290 mW.